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@thommythomaso thommythomaso commented May 30, 2025

Modify the iDMA integration into the Snitch cluster.

This includes:

  • The wide port from the SoC directly connects to the TCDM subsystem, allowing external data access while DMA transfers run
  • The wide DMA crossbar has been simplified
  • The DMA uses the OBI protocol to connect to the TCDM subsystem
  • Arbitration between the channels, the superbanks, and the SoC port happens now in TCDM, increasing flexibility and throughput. With minimal changes, it is possible to have multiple DMA cores in the cluster.

Before merging:

  • Update custom_instructions.md
  • Fix failing tests.
  • Fix linting issues.
  • Check for (perfomrance) regressions
  • Merge the corresponding branch in the iDMA repo into main #88
  • Merge the corresponding branch in the riscv-opcodes repo into main

colluca and others added 2 commits September 24, 2025 23:18
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Co-authored-by: Lucia Luzi <luzil@ethz.ch>
Co-authored-by: Luca Colagrande <colluca@iis.ee.ethz.ch>
@thommythomaso thommythomaso marked this pull request as ready for review September 26, 2025 16:32
@fischeti
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Some notes here on current backend trials I am doing with this:

  • The wide_in path should be cut (by default). At the moment this results in large interface timing violations since there is a combinational path from TCDM to the AXI interface now (and vice-versa). There is already a parameter RegisterExtWide to cut those paths. However, the same parameter is also used to cut the wide_out, which is not necessary since that path already has a cut from the wide AXI Xbar. It would therefore make sense to differentiate with RegisterExtWideIn and RegisterExtWideOut.
  • The TCDM interconnect grows quite a bit with a configuration of 4 DMA channels. This could also be due to the additional external TCDM port, that currently cannot be parametrized away.

I would continue with trials, but I think it makes more sense to wait for #289 to be merged and then rebase this PR.

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3 participants