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20 changes: 10 additions & 10 deletions xls/codegen/vast/vast.h
Original file line number Diff line number Diff line change
Expand Up @@ -1477,11 +1477,19 @@ class LocalParam final : public VastNode {
std::vector<LocalParamItem*> items_;
};

// An indexable expression that can be bit-sliced or indexed.
class IndexableExpression : public Expression {
public:
using Expression::Expression;

bool IsIndexableExpression() const final { return true; }
};

// Refers to a Parameter's definition for use in an expression.
class ParameterRef final : public Expression {
class ParameterRef final : public IndexableExpression {
public:
ParameterRef(Parameter* parameter, VerilogFile* file, const SourceInfo& loc)
: Expression(file, loc), parameter_(parameter) {}
: IndexableExpression(file, loc), parameter_(parameter) {}

std::string Emit(LineInfo* line_info) const final {
return parameter_->GetName();
Expand All @@ -1498,14 +1506,6 @@ class ParameterRef final : public Expression {
Parameter* parameter_;
};

// An indexable expression that can be bit-sliced or indexed.
class IndexableExpression : public Expression {
public:
using Expression::Expression;

bool IsIndexableExpression() const final { return true; }
};

// Reference to the definition of a WireDef, RegDef, or LogicDef.
class LogicRef final : public IndexableExpression {
public:
Expand Down
77 changes: 75 additions & 2 deletions xls/codegen/vast/vast_test.cc
Original file line number Diff line number Diff line change
Expand Up @@ -21,14 +21,14 @@
#include <utility>
#include <vector>

#include "gmock/gmock.h"
#include "gtest/gtest.h"
#include "absl/container/flat_hash_map.h"
#include "absl/status/status.h"
#include "absl/status/status_matchers.h"
#include "absl/strings/str_cat.h"
#include "absl/strings/str_format.h"
#include "absl/types/span.h"
#include "gmock/gmock.h"
#include "gtest/gtest.h"
#include "xls/common/status/matchers.h"
#include "xls/ir/bits.h"
#include "xls/ir/fileno.h"
Expand Down Expand Up @@ -2126,6 +2126,79 @@ TEST_P(VastTest, ArrayAssignmentPattern) {
->Emit(nullptr));
}

TEST_P(VastTest, ArrayParameters) {
if (!UseSystemVerilog()) {
GTEST_SKIP();
}
VerilogFile f(GetFileType());
Module* m = f.AddModule("top", SourceInfo());

const SourceInfo si;
// Literals used for the array assignment patterns below.
Expression* tick0 = f.Make<UnsizedZeroLiteral>(si);

Def* p0_def =
f.Make<Def>(si, "P0", DataKind::kUser,
f.UnpackedArrayType(/*element_bit_count=*/1, {2}, si));
m->AddParameter(p0_def, f.ArrayAssignmentPattern({tick0, tick0}, si), si);

Def* p1_def =
f.Make<Def>(si, "P1", DataKind::kInt,
f.UnpackedArrayType(/*element_bit_count=*/1, {3}, si));
m->AddParameter(
p1_def,
f.ArrayAssignmentPattern(
{f.PlainLiteral(1, si), f.PlainLiteral(2, si), f.PlainLiteral(3, si)},
si),
si);

Def* p2_def =
f.Make<Def>(si, "P2", DataKind::kLogic,
f.UnpackedArrayType(/*element_bit_count=*/8, {2}, si));
m->AddParameter(p2_def,
f.ArrayAssignmentPattern(
{f.Literal(0x42, 8, si), f.Literal(0x43, 8, si)}, si),
si);
Expression* p3_row =
f.ArrayAssignmentPattern({f.PlainLiteral(1, si), f.PlainLiteral(2, si),
f.PlainLiteral(3, si), f.PlainLiteral(4, si)},
si);
Def* p3_def =
f.Make<Def>(si, "P3", DataKind::kUser,
f.UnpackedArrayType(/*element_bit_count=*/1, {1, 4}, si));
m->AddParameter(p3_def, f.ArrayAssignmentPattern({p3_row}, si), si);
Expression* p4_row0 = f.ArrayAssignmentPattern(
{f.PlainLiteral(1, si), f.PlainLiteral(2, si), f.PlainLiteral(3, si)},
si);
Expression* p4_row1 = f.ArrayAssignmentPattern(
{f.PlainLiteral(4, si), f.PlainLiteral(5, si), f.PlainLiteral(6, si)},
si);
Def* p4_def =
f.Make<Def>(si, "P4", DataKind::kInt,
f.UnpackedArrayType(/*element_bit_count=*/1, {2, 3}, si));
m->AddParameter(p4_def, f.ArrayAssignmentPattern({p4_row0, p4_row1}, si), si);
Expression* p5_row0 = f.ArrayAssignmentPattern(
{f.Literal(0x42, 8, si), f.Literal(0x43, 8, si), f.Literal(0x44, 8, si)},
si);
Expression* p5_row1 = f.ArrayAssignmentPattern(
{f.Literal(0x45, 8, si), f.Literal(0x46, 8, si), f.Literal(0x47, 8, si)},
si);
Def* p5_def =
f.Make<Def>(si, "P5", DataKind::kLogic,
f.UnpackedArrayType(/*element_bit_count=*/8, {2, 3}, si));
m->AddParameter(p5_def, f.ArrayAssignmentPattern({p5_row0, p5_row1}, si), si);

EXPECT_EQ(m->Emit(nullptr),
R"(module top;
parameter P0[2] = '{'0, '0};
parameter int P1[3] = '{1, 2, 3};
parameter logic [7:0] P2[2] = '{8'h42, 8'h43};
parameter P3[1][4] = '{'{1, 2, 3, 4}};
parameter int P4[2][3] = '{'{1, 2, 3}, '{4, 5, 6}};
parameter logic [7:0] P5[2][3] = '{'{8'h42, 8'h43, 8'h44}, '{8'h45, 8'h46, 8'h47}};
endmodule)");
}

TEST_P(VastTest, ModuleSections) {
VerilogFile f(GetFileType());
Module* module = f.Make<Module>(SourceInfo(), "my_module");
Expand Down
3 changes: 3 additions & 0 deletions xls/public/c_api_symbols.txt
Original file line number Diff line number Diff line change
Expand Up @@ -363,6 +363,7 @@ xls_vast_logic_ref_get_name
xls_vast_macro_ref_as_expression
xls_vast_make_verilog_file
xls_vast_parameter_ref_as_expression
xls_vast_parameter_ref_as_indexable_expression
xls_vast_slice_as_expression
xls_vast_statement_block_add_blank_line
xls_vast_statement_block_add_blocking_assignment
Expand All @@ -377,6 +378,7 @@ xls_vast_verilog_file_add_include
xls_vast_verilog_file_add_module
xls_vast_verilog_file_emit
xls_vast_verilog_file_free
xls_vast_verilog_file_make_array_assignment_pattern
xls_vast_verilog_file_make_binary
xls_vast_verilog_file_make_bit_vector_type
xls_vast_verilog_file_make_bit_vector_type_with_expression
Expand Down Expand Up @@ -412,6 +414,7 @@ xls_vast_verilog_file_make_slice_i64
xls_vast_verilog_file_make_ternary
xls_vast_verilog_file_make_type_cast
xls_vast_verilog_file_make_unary
xls_vast_verilog_file_make_unpacked_array_type
xls_vast_verilog_file_make_unsized_one_literal
xls_vast_verilog_file_make_unsized_x_literal
xls_vast_verilog_file_make_unsized_zero_literal
Expand Down
39 changes: 39 additions & 0 deletions xls/public/c_api_vast.cc
Original file line number Diff line number Diff line change
Expand Up @@ -401,6 +401,19 @@ struct xls_vast_data_type* xls_vast_verilog_file_make_packed_array_type(
return reinterpret_cast<xls_vast_data_type*>(type);
}

struct xls_vast_data_type* xls_vast_verilog_file_make_unpacked_array_type(
struct xls_vast_verilog_file* f, struct xls_vast_data_type* element_type,
const int64_t* unpacked_dims, size_t unpacked_dims_count) {
auto* cpp_file = reinterpret_cast<xls::verilog::VerilogFile*>(f);
auto* cpp_element_type =
reinterpret_cast<xls::verilog::DataType*>(element_type);
absl::Span<const int64_t> dims(unpacked_dims, unpacked_dims_count);
xls::verilog::DataType* type =
cpp_file->Make<xls::verilog::UnpackedArrayType>(xls::SourceInfo(),
cpp_element_type, dims);
return reinterpret_cast<xls_vast_data_type*>(type);
}

struct xls_vast_def* xls_vast_verilog_file_make_def(
struct xls_vast_verilog_file* f, const char* name, xls_vast_data_kind kind,
struct xls_vast_data_type* type) {
Expand All @@ -412,6 +425,21 @@ struct xls_vast_def* xls_vast_verilog_file_make_def(
return reinterpret_cast<xls_vast_def*>(def);
}

struct xls_vast_expression* xls_vast_verilog_file_make_array_assignment_pattern(
struct xls_vast_verilog_file* f, struct xls_vast_expression** elements,
size_t element_count) {
auto* cpp_file = reinterpret_cast<xls::verilog::VerilogFile*>(f);
std::vector<xls::verilog::Expression*> cpp_elements;
cpp_elements.reserve(element_count);
for (size_t i = 0; i < element_count; ++i) {
cpp_elements.push_back(
reinterpret_cast<xls::verilog::Expression*>(elements[i]));
}
xls::verilog::Expression* expr =
cpp_file->ArrayAssignmentPattern(cpp_elements, xls::SourceInfo());
return reinterpret_cast<xls_vast_expression*>(expr);
}

void xls_vast_verilog_module_add_member_instantiation(
struct xls_vast_verilog_module* m, struct xls_vast_instantiation* member) {
auto* cpp_module = reinterpret_cast<xls::verilog::Module*>(m);
Expand Down Expand Up @@ -687,6 +715,17 @@ xls_vast_logic_ref_as_indexable_expression(
cpp_indexable_expression);
}

struct xls_vast_indexable_expression*
xls_vast_parameter_ref_as_indexable_expression(
struct xls_vast_parameter_ref* parameter_ref) {
auto* cpp_parameter_ref =
reinterpret_cast<xls::verilog::ParameterRef*>(parameter_ref);
auto* cpp_indexable_expression =
static_cast<xls::verilog::IndexableExpression*>(cpp_parameter_ref);
return reinterpret_cast<xls_vast_indexable_expression*>(
cpp_indexable_expression);
}

struct xls_vast_logic_ref* xls_vast_generate_loop_get_genvar(
struct xls_vast_generate_loop* loop) {
auto* cpp_loop = reinterpret_cast<xls::verilog::GenerateLoop*>(loop);
Expand Down
18 changes: 18 additions & 0 deletions xls/public/c_api_vast.h
Original file line number Diff line number Diff line change
Expand Up @@ -152,6 +152,15 @@ struct xls_vast_data_type* xls_vast_verilog_file_make_packed_array_type(
struct xls_vast_verilog_file* f, xls_vast_data_type* element_type,
const int64_t* packed_dims, size_t packed_dims_count);

// Creates an unpacked array type.
//
// Example (SystemVerilog):
// element_type = bit_vector_type(8) and unpacked_dims = {2, 3} yields a type
// that emits like: `[7:0] <ident>[2][3]`.
struct xls_vast_data_type* xls_vast_verilog_file_make_unpacked_array_type(
struct xls_vast_verilog_file* f, xls_vast_data_type* element_type,
const int64_t* unpacked_dims, size_t unpacked_dims_count);

// -- Module::Add*

void xls_vast_verilog_module_add_member_instantiation(
Expand Down Expand Up @@ -349,6 +358,11 @@ struct xls_vast_concat* xls_vast_verilog_file_make_replicated_concat_i64(
struct xls_vast_verilog_file* f, int64_t replication_count,
struct xls_vast_expression** elements, size_t element_count);

// Creates an array assignment pattern expression: `'{a, b, c}`.
struct xls_vast_expression* xls_vast_verilog_file_make_array_assignment_pattern(
struct xls_vast_verilog_file* f, struct xls_vast_expression** elements,
size_t element_count);

struct xls_vast_slice* xls_vast_verilog_file_make_slice_i64(
struct xls_vast_verilog_file* f,
struct xls_vast_indexable_expression* subject, int64_t hi, int64_t lo);
Expand Down Expand Up @@ -430,6 +444,10 @@ struct xls_vast_expression* xls_vast_indexable_expression_as_expression(
struct xls_vast_indexable_expression*
xls_vast_logic_ref_as_indexable_expression(
struct xls_vast_logic_ref* logic_ref);

struct xls_vast_indexable_expression*
xls_vast_parameter_ref_as_indexable_expression(
struct xls_vast_parameter_ref* parameter_ref);
struct xls_vast_logic_ref* xls_vast_generate_loop_get_genvar(
struct xls_vast_generate_loop* loop);

Expand Down
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